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3 ghz variable gain lna with integrated ? w driver amplifier data sheet ADL5246 rev. a document feedback information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 ?2014C2015 analog devices, inc. all rights reserved. technical support www.analog.com features rf output frequency range: 0.6 ghz to 3 ghz output ip3: 37 dbm at 2.2 ghz output p1db: 28 dbm at 2.2 ghz noise figure of input amplifier: 1 db at 2.2 ghz maximum gain: 31.5 db at 2.2 ghz voltage variable attenuation range: 45 db 0 v to 3.3 v attenuation control range integrated bypass switch for low noise vga matched 50 input stage 3.3 v to 5 v single supply 32-lead, 5 mm 5 mm lfcsp package applications multistandard radio receivers point to point rx and tx instrumentation military and aerospace general description the ADL5246 is a high performance, low noise variable gain amplifier (vga) optimized for multistandard base station receivers and point to point receive (rx) and transmit (tx) applications. the low noise figure and excellent linearity performance allow the device to be used in a variety of applications. the device consists of a low noise amplifier, a high linearity vga, and a ? w output driver stage. the variable attenuator networks are optimized to provide high linearity performance over the 45 db gain control range. gain is set using a unipolar control voltage from 0 v to 3.3 v. the output stage of the ADL5246 is an externally tuned ? w driver amplifier, which allows the device to be optimized anywhere between the 0.6 ghz to 3 ghz range, with an average tuning bandwidth of 200 mhz wide. an external filter can be used between the vga and the final driver amplifier. the ADL5246 can be biased between 3.3 v and 5 v to trade off between performance and power consumption. the ADL5246 is fabricated on an advanced gaas process. the device is available in a 32-lead, rohs compliant, 5 mm 5 mm lfcsp and thermally rated to operate over the ?40c to +105c temperature range. functional block diagram ADL5246 v p o s 1 v p o s 2 v s w 1 v g a i n 1 rfin1 rfout3 v g a i n 2 r f o u t 2 r f i n 3 r f i n 2 amp1 amp2 amp3 ep gnd nic v v a 1 v v a 2 rfout1 4 5 7 8 9 12 14 17 19 22 3 10 20 23 24 25 27 29 31 1 2 32 6 13 30 15 28 18 21 26 16 11 vsw1 12233-001 figure 1.
ADL5246 data sheet rev. a | page 2 of 36 table of contents features .............................................................................................. 1 ? applications ....................................................................................... 1 ? general description ......................................................................... 1 ? functional block diagram .............................................................. 1 ? revision history ............................................................................... 2 ? specifications ..................................................................................... 3 ? absolute maximum ratings ............................................................ 8 ? thermal resistance ...................................................................... 8 ? esd caution .................................................................................. 8 ? pin configuration and function descriptions ............................. 9 ? typical performance characteristics ........................................... 10 ? terminology .................................................................................... 22 ? theory of operation ...................................................................... 23 ? basic connections ...................................................................... 23 ? error vector magnitude (evm) performance ........................... 27 ? thermal information and recommended pcb land pattern ... 28 ? full chain operation considerations ..................................... 28 ? evaluation board ............................................................................ 29 ? characterization information ....................................................... 33 ? outline dimensions ....................................................................... 34 ? ordering guide .......................................................................... 34 ? revision history 9/15rev. 0 to rev. a changes to table 1 ............................................................................ 5 added figure 21 to figure 26; renumbered sequentially ........ 13 added figure 27 to figure 32 ........................................................ 14 added figure 33 to figure 38 ........................................................ 15 changes to figure 57, figure 58, figure 59 ................................. 19 changes to full chain operation considerations section ....... 28 4/14revision 0: initial version
data sheet ADL5246 rev. a | page 3 of 36 specifications v pos = 5 v, t a = 25 c , unless otherwise noted. amplifier 1 = amp1, amplifier 2 = amp2, and amplifier 3 = amp3. table 1 . 3.3 v 5 v parameter test conditions /comments min typ max min typ max unit overall function frequency range 0.6 3 0.6 3 ghz amp1 frequency = 0.75 ghz rfin1 and rfout1 pins gain 19.5 20 db vs. frequency 50 mhz 0.3 0.3 db vs. temperature ?40c t a +105c 0.6 0.5 db vs. supply 3.135 v to 3.465 v , 4.75 v to 5.25 v 0.1 0.05 db input return loss s11 ? 21 ? 22 db output return loss s22 ? 9 ? 9 db output 1 db compression point 18.5 21.5 dbm output third order intercept ?f = 1 mhz, p out = 0 dbm/tone 31 34.5 dbm noise figure 1.4 1.5 db amp1 frequency = 0.9 ghz rfin1 and rfout1 pins gain 19 18.5 db vs. frequency 50 mhz 0.4 0.4 db vs. temperature ?40c t a +105c 0.5 0.5 db vs. supply 3.135 v to 3.465 v , 4.75 v to 5.25 v 0.1 0.05 db input return loss s11 ? 21 ? 24 db output return loss s22 ? 11 ? 10 db output 1 db compression point 19 22 dbm output third order intercept ?f = 1 mhz, p out = 0 dbm/tone 32 35 dbm noise figure 0.9 1.2 db amp1 frequency = 1.5 ghz rfin1 and rfout1 pins gain 15 14.5 db vs. frequency 100 mhz 0.7 0.4 db vs. temperature ?40c t a +105c 0.4 0.5 db vs. supply 3.135 v to 3.465 v , 4.75 v to 5.25 v 0.1 0.1 db input return loss s11 ? 14.5 ? 16 db output return loss s22 ? 14 ? 12 db output 1 db compression point 19 22.5 dbm output third order intercept ?f = 1 mhz, p out = 0 dbm/tone 33 37 dbm noise figure 0.8 0.85 db amp1 frequency = 1.9 ghz rfin1 and rfout1 pins gain 12.5 13 db vs. frequency 100 mhz 0.5 0.5 db vs. temperature ?40c t a +105c 0.5 0.5 db vs. supply 3.135 v to 3.465 v , 4.75 v to 5.25 v 0.1 0.05 db input return loss s11 ? 13 ? 14 db output return loss s22 ? 14 ? 12 db output 1 db compression point 19 22.5 dbm output third order intercept ?f = 1 mhz, p out = 0 dbm/tone 34 37.5 dbm noise figure 0.9 0.9 db
ADL5246 data sheet rev. a | page 4 of 36 3.3 v 5 v parameter test conditions /comments min typ max min typ max unit amp1 frequency = 2.2 ghz rfin1 and rfout1 pins gain 11 1 1.5 db vs. frequency 100 mhz 0.5 0.5 db vs. temperature ?40c t a +105c 0.5 0.5 db vs. supply 3.135 v to 3.465 v , 4.75 v to 5.25 v 0.05 0.05 db input return loss s11 ? 11 ? 12 db output return loss s22 ? 15 ? 12 db output 1 db compression point 19 22. 3 dbm output third order intercept ?f = 1 mhz, p out = 0 dbm/tone 34 37.5 dbm noise figure 1 1 db amp1 frequency = 2.6 ghz rfin1 and rfout1 pins gain 10 10 db vs. frequency 100 mhz 0.4 0.5 db vs. temperature ?40c t a +105c 0.4 0.5 db vs. supply 3.135 v to 3.465 v , 4.75 v to 5.25 v 0.05 0.05 db input return loss s11 ? 10 ? 11 db output return loss s22 ? 17 ? 13 db output 1 db compression point 19.5 22.5 dbm output third order intercept ?f = 1 mhz, p out = 0 dbm/tone 34 37.4 dbm noise figure 1.2 1.2 db amp2 frequency = 0.75 ghz rfin2 to rfout2 at maximum gain gain 12.5 16 db vs. frequency 50 mhz 0.4 0.4 db vs. temperature ?40c t a +105c +3 to ? 4 +0.5 to ? 2 db gain range hg m ode 15 60 db input return loss ? 10 ? 9 db output return loss ? 29 ? 16 db input 1 db compression point 2 4.5 dbm input third order intercept ?f = 1 mhz, p in = ? 5 dbm/tone 13 15 dbm noise figure 4.5 3.5 db amp2 frequency = 0.9 ghz rfin2 to rfout2 at maximum gain gain 11.5 14.5 db vs. frequency 50 mhz 0.5 0.5 db vs. temperature ?40c t a +105c +2.5 to ? 4 +0.5 to ? 2 db gain range hg m ode 15 60 db input return loss ? 9.5 ? 9 db output return loss ? 21 ? 15 db input 1 db compression point 3.5 5.5 dbm input third order intercept ?f = 1 mhz, p in = ? 5 dbm/tone 14 15.5 dbm noise figure 4.2 3.2 db
data sheet ADL5246 rev. a | page 5 of 36 3.3 v 5 v parameter test conditions /comments min typ max min typ max unit amp2 frequency = 1.5 ghz rfin2 to rfout2 at maximum gain gain 7.5 10 db vs. frequency 100 mhz 0.6 0.7 db vs. temperature ?40c t a +105c +2.5 to ? 4 +0.5 to ? 2 db gain range hg m ode 14.5 50 db input return loss ? 9 ? 10 db output return loss ? 12 ? 10 db input 1 db compression point 7 8 dbm input third order intercept ?f = 1 mhz, p in = ? 5 dbm/tone 18.5 19.5 dbm noise figure 4.2 3.2 db amp2 frequency = 1.9 ghz rfin2 to rfout2 at maximum gain gain 5 7.5 db vs. frequency 100 mhz 0.6 0.6 db vs. temperature ?40c t a +105c +2.5 to ? 4 +0.5 to ? 2 db gain range hg m ode 14 48 db input return loss ? 9 ? 10 db output return loss ? 10 ? 8 db input 1 db compression point 9 10 dbm input third order intercept ?f = 1 mhz, p in = ? 5 dbm/tone 20.5 21.5 dbm noise figure 4.6 3.6 db amp2 frequency = 2.2 ghz rfin2 to rfout2 at maximum gain gain 3.5 5.5 db vs. frequency 100 mhz 0.5 0.5 db vs. temperature ?40c t a +105c +2 to ? 3 +0.5 to ? 2 db gain range hg m ode 13.5 45 db input return loss ? 9 ? 10 db output return loss ? 8 ? 7 db input 1 db compression point 11 11 dbm input third order intercept ?f = 1 mhz, p in = ? 5 dbm/tone 22.5 23 dbm noise figure 5.1 4.2 db amp2 frequency = 2.6 ghz rfin2 to rfout2 at maximum gain gain 1.5 3.7 db vs. frequency 100 mhz 0.5 0.5 db vs. temperature ?40c t a +105c +2 to ? 3 +0.3 to ? 3 db gain range hg m ode 13 42 db input return loss ? 9 ? 10 db output return loss ? 7.5 ? 6.5 db input 1 db compression point 14 13.5 dbm input third order intercept ?f = 1 mhz, p in = C 5 dbm/tone 24 24.5 dbm noise figure 5.3 4.3 db amp2 gain settling, 0.9 ghz rfin2 to rfout2 full range step, vgain1 or vgain2 1 db s ettling, hg mode 0 to 3.3 v 2 1 s 3.3 to 0 v 4 3 s 0.5 v gain step hg m ode, v gain1 = 2.0 to 1.5 v, 1 db settling 4 3 s hg to lg transition v gain1 = v gain2 = 0 v, 1 db s ettling 0.3 0.2 s lg to hg transition v gain1 = v gain2 = 0 v, 1 db s ettling 0.2 0.1 s
ADL5246 data sheet rev. a | page 6 of 36 3.3 v 5 v parameter test conditions /comments min typ max min typ max unit amp3 frequency = 0.75ghz rfin3 to rfout3 pins gain db v s. frequency 50 mhz +0 to ? 1 +0 to ? 1.25 db v s. temperature ?40c ta +105c +0.5 to ? 1 +0.6 to ? 0.9 db v s. supply 3.135 v to 3.465 v +0.3 to ? 0.3 db 4.75 v to 5.25 v +0.05 to ? 0.1 db input return loss s11 ? 10.5 ? 14 db output return loss s22 ? 10 ? 12.4 db output 1 db compression point 26 28.8 dbm output third order intercept ?f = 1 mhz, p out = 0 dbm/tone 31.8 41 dbm noise figure 3.5 4.5 db amp3 frequency = 0.9 ghz rfin3 to rfout3 pins gain 16.3 16.3 db vs. frequency 50 mhz +0 to ? 0.7 +0 to ? 1 db vs. temperature ?40c ta +105c +0.6 to ? 0.8 +0.6 to ? 0.9 db vs. supply 3.135 v to 3.465 v +0.3 to ? 0.3 db 4.75 v to 5.25 v +0.05 to ? 0.15 db input return loss s11 ? 11.5 ? 13.5 db output return loss s22 ? 12.5 ? 13.5 db output 1 db compression point 25.5 29 dbm output third order intercept ?f = 1 mhz, p out = 0 dbm/tone 33.8 41.4 dbm noise figure 3.3 4.3 db amp3 frequency = 1.9 ghz rfin3 to rfout3 pins gain 12.8 13.8 db vs. frequency 100 mhz 0 to ? 2 0 to ? 1.5 db vs. temperature ?40c t a +105c +0.7 to ? 1 +0.7 to ? 1 db vs. supply 3.135 v to 3.465 v , 4.75 v to 5.25 v +0.3 to ? 0.2 0 to ? 0.2 db input return loss s11 ? 14 ? 14 db output return loss s22 ? 16 ? 18 db output 1 db compression point 24.5 28.5 dbm output third order intercept ?f = 1 mhz, p out = 0 dbm/tone 30.5 37.8 dbm noise figure 5.8 6.1 db amp3 frequency = 2.2 ghz rfin3 to rfout3 pins gain 12 12.8 db vs. frequency 100 mhz 0 to ? 1.75 0 to ? 1.8 db vs. temperature ?40c t a +105c +1 to ? 1 + 1 to ? 1 db vs. supply 3.135 v to 3.465 v , 4.75 v to 5.25 v +0.4 to ? 0.2 0 to ? 0.3 db input return loss s11 ? 14 ? 15.5 db output return loss s22 ? 16 ? 18 db output 1 db compression point 25 28.8 dbm output third order intercept ?f = 1 mhz, p out = 0 dbm/tone 28 37 dbm noise figure 5.4 5.9 db
data sheet ADL5246 rev. a | page 7 of 36 3.3 v 5 v parameter test conditions /comments min typ max min typ max unit amp3 frequency = 2.6 ghz rfin3 to rfout3 pins gain 10.3 11.1 db vs. frequency 100 mhz 0 to ? 1.8 0 to ? 1.4 db vs. temperature ?40c t a +105c +1 to ? 1.2 +1 to ? 1.2 db vs. supply 3.135 v to 3.465 v , 4.75 v to 5.25 v +0.4 to ? 0.1 0 to ? 0.3 db input return loss s11 ? 10 ? 10 db output return loss s22 ? 17 ? 17 db output 1 db compression point 22.5 27 dbm output third order intercept ?f = 1 mhz, p out = 0 dbm/tone 30 38 dbm noise figure 7.5 7.8 db full chain frequency = 2.2 ghz amp1
ADL5246 data sheet rev. a | page 8 of 36 absolute maximum rat ings table 2 . parameter rating supply voltage, v pos 5.5 v max imum rf input level (a mp 1) 20 dbm internal power dissipation 3 w maximum junction temperature 150c operating temperature range C 40c to +105c storage temperature range C 65c to +150c lead temperature range (soldering 3 0 sec) 2 5 0 c human body model (hbm) esd rating (esda/jedec js -001- 2011) 1.0 kv stresses at or above those listed under absolute maximum ratings may cause permanent damage to the product. this is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. operation beyond the maximum operating conditions for extended periods may affect product reliabilit y. thermal resistance ja is spec ified for a ADL5246 soldered to the evaluation board, a 4 - layer circuit board with a 5 5 thermal via array under the exposed paddle. ja measured at the top of the package. jc derived using a jedec test board. table 3 . thermal resistance package type ja jc unit 32 - lead lfcsp 16.5 1.15 c/ w esd caution
data sheet ADL5246 rev. a | page 9 of 36 pin configuration and function descrip tions notes 1. nic = no interna l connection. 2. the exposed p addle (ep) must be soldered t o a low impedance ground plane. 24 gnd 23 gnd 22 nic 21 rfin3 20 gnd 19 nic 18 rfout2 17 nic 1 2 3 4 5 6 7 8 gnd rfin1 gnd nic nic vsw1 nic nic 9 10 1 1 12 13 14 15 16 nic gnd vpos1 nic vsw1 nic vgain1 vgain2 32 31 30 29 28 27 26 25 rfout1 gnd rfin2 gnd vpos2 gnd rfout3 gnd 12233-002 ADL5246 t op view exposed p ad figure 2 . pin configuration table 4 . pin function descriptions pin no. mnemonic description 1, 3, 10, 20, 23, 24 , 25, 27, 29, 31, ep gnd ground. the exposed paddle (ep) and ground pins must be soldered to a low impedance ground plane. 2 rfin1 rf i nput . this pin requires a dc blocking capacitor. use a 100 pf capacitor for normal operation. 4, 5, 7, 8, 9, 12, 14, 17, 19, 22 nic no internal c onnection. these pins are not connected to internal circuitry . the user may optionally s older to a low impedance ground plane for grounding, shielding , and printed circuit board (pcb) trace impedance continuity. 6 vsw1 bypass switch control . logic l ow = 0 v , and logic high = 3.3 v. switch logic is shown in table 5 . 11 vpos1 bias for the amp2 lna. connect this pin to the dc supply voltage through an rf choke. 13 vsw1 bypass switch control . logic l ow = 0 v, and logic h igh = 3.3 v. switch logic is shown in table 5 . 15 vgain1 gain c ontrol for vva1 . the gain control range is 0 v to 3.3 v. 16 vgain2 gain c ontrol vva2 . the gain control range is 0 v to 3.3 v. 18 rfout2 rf o utput of the v oltage v ariable a ttenuator ( vva ) b lock. 21 rfin3 driver amplifier input. this pin requires a dc blocking capacitor. use a 100 pf capacitor for normal operation. 26 rfout3 driver amplifier output. c onnect this pin to a dc supply through an rf choke . 28 vpos2 bias for vva1, vva2 , and the amp3 bias circuit . connect this pin to the dc supply voltage through an rf choke. 30 rfin2 rf i nput to the vga b lock. 32 rfout1 low noise amplifier output. connect this pin to a dc supply through an rf choke.
ADL5246 data sheet rev. a | page 10 of 36 typical performance characteristics all supply pins at 5 v, t a = 25c, unless otherwise noted. ?5 0 5 10 15 20 25 30 35 0 5 10 15 20 25 30 35 40 0.6 1.0 1.4 1.8 2.2 2.6 3.0 amp1 op1db (dbm) amp1 gain, oip3, and noise figure (db, dbm) frequency (ghz) gain, 5.0v oip3, 5.0v noise figure, 5.0v gain, 3.3v oip3, 3.3v noise figure, 3.3v op1db, 5.0v op1db, 3.3v 12233-003 figure 3. amp1 gain, oip3 at p out = 0 dbm/tone, noise figure, and op1db vs. frequency 0 8 16 24 32 40 48 0 4 8 12 16 20 24 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 amp1 gain (db), 3.3v amp1 gain (db), 5.0v frequency (ghz) 12233-004 t a = ?40c t a = +25c t a = +85c t a = +105c figure 4. amp1 gain vs. frequency by temperature ?40 ?35 ?30 ?25 ?20 ?15 ?10 ?5 0 0.6 1.0 1.4 1.8 2.2 2.6 3.0 amp1 magnitude (db) frequency (ghz) s11, 5.0v s12, 5.0v s22, 5.0v s11, 3.3v s12, 3.3v s22, 3.3v 12233-005 figure 5. amp1 magnitude of input return loss (s11), output return loss (s22), and reverse isolation (s12) vs. frequency 15.0 17.5 20.0 22.5 25.0 27.5 30.0 32.5 35.0 10 15 20 25 30 35 40 45 50 0.6 1.0 1.4 1.8 2.2 2.6 3.0 amp1 oip3 and op1db (dbm), 3.3v amp1 oip3 and op1db (dbm), 5.0v frequency (ghz) oip3, 3.3v oip3, 5.0v op1db, 5.0v t a = ?40c t a = +25c t a = +85c t a = +105c op1db, 3.3v 12233-006 figure 6. amp1 oip3 at p out = 0 dbm/tone and op1db vs. frequency by temperature 24 26 28 30 32 34 36 38 40 ?10 ?5 0 5 10 15 amp1 oip3 (dbm) p out (dbm) 0.9ghz, 5.0v 1.9ghz, 5.0v 2.6ghz, 5.0v 0.9ghz, 3.3v 1.9ghz, 3.3v 2.6ghz, 3.3v 12233-007 figure 7. amp1 oip3 vs. p out by frequency 0 0.5 1.0 1.5 2.0 2.5 3.0 0.6 1.0 1.4 1.8 2.2 2.6 3.0 amp1 noise figure (db) frequency (ghz) t a = ?40c, 3.3v t a = +25c, 5.0v t a = +85c, 3.3v t a = +85c, 5.0v t a = +105c, 5.0v t a = ?40c, 5.0v t a = +25c, 3.3v t a = +105c, 3.3v 12233-008 figure 8. amp1 noise figure vs. frequency by temperature
data sheet ADL5246 rev. a | page 11 of 36 ?60 ?50 ?40 ?30 ?20 ?10 0 10 20 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 amp2 gain (db) 0.9ghz, 5.0v, hg 0.9ghz, 5.0v, lg 1.9ghz, 5.0v, hg 1.9ghz, 5.0v, lg 2.6ghz, 5.0v, hg 2.6ghz, 5.0v, lg v gain1 , v gain2 (v) 12233-009 figure 9. amp2 gain vs. v gain1 , v gain2 at three frequencies, 5 v supply, both gain controls varied, v gain1 = v gain2 ?60 ?50 ?40 ?30 ?20 ?10 0 10 20 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 amp2 gain (db) v gain1 , v gain2 (v) 12233-010 0.9ghz, 5v, hg, v gain1 0.9ghz, 5v, lg, v gain1 0.9ghz, 5v, hg, v gain2 0.9ghz, 5v, lg, v gain2 2.6ghz, 5v, hg, v gain1 2.6ghz, 5v, lg, v gain1 2.6ghz, 5v, hg, v gain2 2.6ghz, 5v, lg, v gain2 figure 10. amp2 gain vs. v gain1 ,v gain2 at two frequencies, 5 v supply, only one gain control varied ?200 ?150 ?100 ?50 0 50 100 150 200 250 300 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 amp2 unwrapped phase (degrees) 0.9ghz, 5.0v, hg 0.9ghz, 5.0v, lg 1.9ghz, 5.0v, hg 1.9ghz, 5.0v, lg 2.6ghz, 5.0v, hg 2.6ghz, 5.0v, lg v gain1 , v gain2 (v) 12233-011 figure 11. amp2 unwrapped phase vs. v gain1 , v gain2 at three frequencies, 5 v supply, both gain controls varied, v gain1 = v gain2 ?25 ?20 ?15 ?10 ?5 0 5 10 15 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 amp2 gain (db) 0.9ghz, 3.3v, hg 0.9ghz, 3.3v, lg 1.9ghz, 3.3v, hg 1.9ghz, 3.3v, lg 2.6ghz, 3.3v, hg 2.6ghz, 3.3v, lg v gain1 , v gain2 (v) 12233-012 figure 12. amp2 gain vs. v gain1 ,v gain2 at three frequencies, 3.3 v supply, both gain controls varied, v gain1 = v gain2 ?25 ?20 ?15 ?10 ?5 0 5 10 15 0 0.51.01.52.02.53.03.5 amp2 gain (db) v gain1 , v gain2 (v) 12233-013 0.9ghz, 3.3v, hg, v gain1 0.9ghz, 3.3v, lg, v gain1 0.9ghz, 3.3v, hg, v gain2 0.9ghz, 3.3v, lg, v gain2 2.6ghz, 3.3v, hg, v gain1 2.6ghz, 3.3v, lg, v gain1 2.6ghz, 3.3v, hg, v gain2 2.6ghz, 3.3v, lg, v gain2 figure 13. amp2 gain vs. v gain1 , v gain2 at two frequencies, 3.3 v supply, only one gain control varied ?200 ?150 ?100 ?50 0 50 100 150 200 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 amp2 unwrapped phase (degrees) v gain1 , v gain2 (v) 0.9ghz, 3.3v, hg 0.9ghz, 3.3v, lg 1.9ghz, 3.3v, hg 1.9ghz, 3.3v, lg 2.6ghz, 3.3v, hg 2.6ghz, 3.3v, lg 12233-014 figure 14. amp2 unwrapped phase vs. v gain1 , v gain2 at three frequencies, 3.3 v supply, both gain controls varied, v gain1 = v gain2
ADL5246 data sheet rev. a | page 12 of 36 0 2 4 6 8 10 12 14 16 18 0.6 1.0 1.4 1.8 2.2 2.6 3.0 12233-015 amp2 input p1db (dbm) frequency (ghz) 5.0v 3.3v figure 15. amp2 input p1db vs. fr equency at maximum gain, hg only ?50 ?40 ?30 ?20 ?10 0 0.6 1.0 1.4 1.8 2.2 2.6 3.0 amp2 magnitude of s11 (db) frequency (ghz) 12233-016 figure 16. amp2 magnitude of input return loss (s11) vs. frequency, 5 v supply, gain stepped across full range ?5 0 5 10 15 20 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 amp2 gain (db) frequency (ghz) t a = ?40c, 5.0v t a = +25c, 5.0v t a = +85c, 5.0v t a = +105c, 5.0v t a = ?40c, 3.3v t a = +25c, 3.3v t a = +85c, 3.3v t a = +105c, 3.3v 12233-017 figure 17. amp2 gain vs. frequency by temperatures at maximum gain 10 12 14 16 18 20 22 24 26 28 30 0.6 1.0 1.4 1.8 2.2 2.6 3.0 amp2 input ip3 (dbm) frequency (ghz) 5.0v 3.3v 12233-018 figure 18. amp2 input ip3 vs. frequency at maximum gain, hg only ?50 ?40 ?30 ?20 ?10 0 0.6 1.0 1.4 1.8 2.2 2.6 3.0 amp2 magnitude of s22 (db) frequency (ghz) 12233-019 figure 19. amp2 magnitude of output return loss (s22) vs. frequency, 5 v supply, gain stepped across full range 0 2 4 6 8 10 12 14 16 0.6 1.0 1.4 1.8 2.2 2.6 3.0 amp2 noise figure (db) frequency (ghz) 5.0v, hg 3.3v, hg 5.0v, lg 3.3v, lg 12233-020 figure 20. amp2 noise fi gure vs. frequency at v gain1 = v gain2 = 0 v
data sheet ADL5246 rev. a | page 13 of 36 ?80 ?60 ?40 ?20 0 20 40 60 80 ?4 ?3 ?2 ?1 0 1 2 3 4 ?10123456 rf output into 50 ? (mv) v gain1 (v) time (s) 12233-121 figure 21. amp2 typical output response with 3.3 v step on v gain1 , v gain2 = 0 v, hg mode, 0.9 ghz ?50 0 50 100 150 200 0 0.5 1.0 1.5 2.0 2.5 ?4?3?2?1012345678910111213141516 rf output into 50 ? (mv) time (s) v gain1 (v) 12233-122 figure 22. amp2 typical output response with 0.5 v step on v gain1 , v gain2 = 0 v, hg mode, 0.9 ghz ?100 ?50 0 50 100 150 200 250 300 350 400 ?5 ?4 ?3 ?2 ?1 1 0 2 3 4 5 ?0.3 ?0.2 ?0.1 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 rf output into 50 ? (mv) time ( s) v vsw1 , v vsw1 (v) lg mode hg mode lg mode 12233-123 figure 23. amp2 typical output response during gain mode switching, v gain1 = v gain2 = 0 v, 0.9 ghz ?80 ?60 ?40 ?20 0 20 40 60 80 ?4 ?3 ?2 ?1 1 2 3 4 ?10123456 rf output (mv) v gain2 (v) time (s) 12233-124 figure 24. amp2 typical output response with 3.3 v step on v gain2 , v gain1 = 0 v, hg mode, 0.9 ghz ? 15 ?10 ?5 0 5 10 15 ?1.0 ?0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 ?4 ?2 0 2 4 6 8 10 12 14 16 rf output into 50 ? (mv) v gain2 (v) time (s) 12233-125 figure 25. amp2 typical output response with 3.3 v step on v gain2 , v gain1 = 3.3 v, hg mode, 0.9 ghz ?8 ?6 ?4 ?2 0 2 4 6 8 0 0.5 1.0 1.5 2.0 2.5 3.0 amp2 gain shift a t temper a ture (db) v gain1 , v gain2 (v) ?40c +85c +105c 12233-126 figure 26. amp2 typical gain shift at temperature with respect to 25 c vs. v gain1 = v gain2 , both gain controls varied, 1.75 ghz
ADL5246 data sheet rev. a | page 14 of 36 0 5 10 15 20 25 30 35 40 45 50 0.70 0.71 0.72 0.73 0.74 0.75 0.76 0.77 0.78 0.79 0.80 amp3 gain, oip3, op1db, and noise figure (db, dbm) frequency (ghz) 5v 3.3v gain op1db oip3 noise figure 12233-127 figure 27. amp3 0.75 ghz gain, oip3 at p out = 0 dbm/tone, op1db and noise figure vs. frequency 12 14 16 18 20 22 24 26 28 12 13 14 15 16 17 18 19 20 0.70 0.71 0.72 0.73 0.74 0.75 0.76 0.77 0.78 0.79 0.80 amp3 gain at 3.3v (db) amp3 gain a t 5v (db) frequency (ghz) 12233-128 t a = ?40c t a = +25c t a = +85c t a = +105c figure 28. amp3 0.75 ghz gain vs. frequency by temperature ?35 ?30 ?25 ?20 ?15 ?10 ?5 0 0.65 0.70 0.75 0.80 0.85 amp3 magnitude (db) frequency (ghz) s11 (db) s12 (db) s22 (db) 12233-129 figure 29. amp3 0.75 ghz magnitude of input return loss (s11), output return loss (s22), and reverse isolation (s12) vs. frequency 20 25 30 35 40 45 50 0.70 0.71 0.72 0.73 0.74 0.75 0.76 0.77 0.78 0.79 0.80 amp3 oip3 and op1db (dbm) frequency (ghz) oip3, 5v oip3, 3.3 v op1db, 3.3 v op1db, 5v 12233-130 t a = ?40c t a = +25c t a = +85c t a = +105c figure 30. amp3 0.75 ghz oip3 at p out = 0 dbm/tone and op1db vs. frequency by temperature 30 32 34 36 38 40 42 44 46 48 50 ?10 ?5 0 5 10 15 20 amp3 oip3 (dbm) p out (dbm) 5v 3.3v 0.70ghz 0.75ghz 0.80ghz 12233-131 figure 31. amp3 0.75 ghz oip3 vs. p out by frequency 2 3 4 5 6 7 0.70 0.71 0.72 0.73 0.74 0.75 0.76 0.77 0.78 0.79 0.80 amp3 noise figure (db) frequency (ghz) 5v 3.3v ?40c +25c +85c +105c 12233-132 figure 32. amp3 0.75 ghz noise figure vs. frequency by temperature
data sheet ADL5246 rev. a | page 15 of 36 0 5 10 15 20 25 30 35 40 45 0.85 0.86 0.87 0.88 0.89 0.90 0.91 0.92 0.93 0.94 0.95 amp3 gain, oip3, op1db and noise figure (db, dbm) frequency (ghz) 5v 3.3v gain op1db oip3 noise figure 12233-133 figure 33. amp3 0.9 ghz gain, oip3 at p out = 0 dbm/tone, op1db, and noise figure vs. frequency 14 16 18 20 22 24 26 28 30 12 13 14 15 16 17 18 19 20 0.85 0.86 0.87 0.88 0.89 0.90 0.91 0.92 0.93 0.94 0.95 gain at 3.3v (db) amp3 gain a t 5v (db) frequency (ghz) 12233-134 t a = ?40c t a = +25c t a = +85c t a = +105c figure 34. amp3 0.9 ghz gain vs. frequency by temperature ?35 ?30 ?25 ?20 ?15 ?10 ?5 0 0.80 0.85 0.90 0.95 1.00 amp3 magnitude (db) frequency (ghz) s11 (db) s12 (db) s22 (db) 12233-135 figure 35. amp3 0.9 ghz input return loss (s11), output return loss (s22), and reverse isolation (s12) vs. frequency 20 25 30 35 40 45 0.85 0.86 0.87 0.88 0.89 0.90 0.91 0.92 0.93 0.94 0.95 amp3 opip3 and op1db (dbm) frequency (ghz) oip3, 5.0v oip3, 3.3v op1db, 5.0v op1db, 3.3v 12233-136 t a = ?40c t a = +25c t a = +85c t a = +105c figure 36. amp3 0.9 ghz oip3 at p out = 0 dbm/tone and op1db vs. frequency by temperature 25 30 35 40 45 50 ?10?5 0 5 101520 amp3 oip3 (dbm) p out (dbm) 12233-137 0.85ghz, 5.0v 0.90ghz, 5.0v 0.95ghz, 5.0v 0.85ghz, 3.3v 0.90ghz, 3.3v 0.95ghz, 3.3v figure 37. amp3 0.9 ghz oip3 vs. p out by frequency 2 3 4 5 6 0.85 0.86 0.87 0.88 0.89 0.90 0.91 0.92 0.93 0.94 0.95 amp3 noise figure (db) f r e q u e n c y ( g h z ) 5.05v 3.35v 12233-138 t a =?40c t a =+25c t a =+85c t a =+105c figure 38. amp3 0.9 ghz noise figu re vs. frequency by temperature
ADL5246 data sheet rev. a | page 16 of 36 0 5 10 15 20 25 30 35 40 45 1.80 1.85 1.90 1.95 2.00 amp3 gain, oip3, op1db, and noise figure (db, dbm) frequency (ghz) gain, 5.0v op1db, 5.0v oip3, 5.0v noise figure, 5.0v gain, 3.3v op1db, 3.3v oip3, 3.3v noise figure, 3.3v 12233-021 figure 39. amp3 1.9 ghz gain, oip3 at p out = 0 dbm/tone, op1db, and noise figure vs. frequency amp3 gain (db), 3.3v amp3 gain (db), 5.0v frequency (ghz) 12233-022 t a = ?40c t a = +25c t a = +85c t a = +105c 8 10 12 14 16 18 20 22 24 0 2 4 6 8 10 12 14 16 1.80 1.85 1.90 1.95 2.00 figure 40. amp3 1.9 ghz gain vs. frequency by temperature ?30 ?25 ?20 ?15 ?10 ?5 0 1.80 1.85 1.90 1.95 2.00 amp3 magnitude (db) 12233-023 frequency (ghz) s11 (db) s12 (db) s22 (db) figure 41. amp3 1.9 ghz magnitude of input return loss (s11), output return loss (s22), and reverse isolation (s12) vs. frequency 22 24 26 28 30 32 34 36 38 40 42 1.80 1.85 1.90 1.95 2.00 amp3 oip3 and op1db (dbm) frequency (ghz) oip3, 5.0v op1db, 5.0v oip3, 3.3v op1db, 3.3v t a = ?40c t a = +25c t a = +85c t a = +105c 12233-024 figure 42. amp3 1.9 ghz oip3 at p out = 0 dbm/tone and op1db vs. frequency by temperature 20 25 30 35 40 45 ?10?5 0 5 101520 amp3 oip3 (dbm) p out (dbm) 1.8ghz, 5.0v 1.9ghz, 5.0v 2.0ghz, 5.0v 1.8ghz, 3.3v 1.9ghz, 3.3v 2.0ghz, 3.3v 12233-025 figure 43. amp3 1.9 ghz oip3 vs. p out by frequency 3 4 5 6 7 8 9 10 1.80 1.85 1.90 1.95 2.00 t a = ?40c, 5.0v t a = +25c, 5.0v t a = +85c, 5.0v t a = +105c, 5.0v t a = ?40c, 3.3v t a = +25c, 3.3v t a = +85c, 3.3v t a = +105c, 3.3v amp3 noise figure (db) frequency (ghz) 12233-026 figure 44. amp3 1.9 ghz noise figu re vs. frequency by temperature
data sheet ADL5246 rev. a | page 17 of 36 0 5 10 15 20 25 30 35 40 2.10 2.15 2.20 2.25 2.30 amp3 gain, oip3, op1db, and noise figure (db, dbm) frequency (ghz) gain, 5.0v op1db, 5.0v oip3, 5.0v noise figure, 5.0v gain, 3.3v op1db, 3.3v oip3, 3.3v noise figure, 3.3v 12233-027 figure 45. amp3 2.2 ghz gain, oip3 at p out = 0 dbm/tone, op1db, and noise figure vs. frequency 4 8 12 16 20 24 28 32 2 4 6 8 10 12 14 16 2.10 2.15 2.20 2.25 2.30 amp3 gain (db), 3.3v amp3 gain (db), 5v frequency (ghz) t a = ?40c t a = +25c t a = +85c t a = +105c 12233-028 figure 46. amp3 2.2 ghz gain vs. frequency by temperature ?30 ?25 ?20 ?15 ?10 ?5 0 2.10 2.15 2.20 2.25 2.30 amp3 magnitude (db) 12233-029 frequency (ghz) s11 (db) s12 (db) s22 (db) figure 47. amp3 2.2 ghz input return loss (s11), output return loss (s22), and reverse isolation (s12) vs. frequency 2.10 2.15 2.20 2.25 2.30 frequency (ghz) oip3, 5.0v op1db, 3.3v 12233-030 20 22 24 26 28 30 32 34 26 28 30 32 34 36 38 40 amp3 oip3 and op1db (dbm), 3.3v amp3 oip3 and op1db (dbm), 5v op1db, 5.0v t a = ?40c t a = +25c t a = +85c t a = +105c oip3, 3.3v figure 48. amp3 2.2 ghz oip3 at p out = 0 dbm/tone and op1db vs. frequency by temperature 20 25 30 35 40 45 ?10 ?5 0 5 10 15 20 amp3 oip3 (dbm) p out (dbm) 2.1ghz, 5.0v 2.2ghz, 5.0v 2.3ghz, 5.0v 2.1ghz, 3.3v 2.2ghz, 3.3v 2.3ghz, 3.3v 12233-031 figure 49. amp3 2.2 ghz oip3 vs. p out by frequency 3 4 5 6 7 8 9 2.10 2.15 2.20 2.25 2.30 12233-032 amp3 noise figure (db) frequency (ghz) t a = ?40c, 5.0v t a = +25c, 5.0v t a = +85c, 5.0v t a = +105c, 5.0v t a = ?40c, 3.3v t a = +25c, 3.3v t a = +85c, 3.3v t a = +105c, 3.3v figure 50. amp3 2.2 ghz noise figu re vs. frequency by temperature
ADL5246 data sheet rev. a | page 18 of 36 0 5 10 15 20 25 30 35 40 45 2.50 2.55 2.60 2.65 2.70 amp3 gain, oip3, op1db, and noise figure (db, dbm) frequency (ghz) gain, 5.0v op1db, 5.0v oip3, 5.0v noise figure, 5.0v gain, 3.3v op1db, 3.3v oip3, 3.3v noise figure, 3.3v 12233-033 figure 51. amp3 2.6 ghz gain, oip3 at p out = 0 dbm/tone, op1db, and noise figure vs. frequency 5 7 9 11 13 15 17 19 21 23 25 ?5 ?3 ?1 1 3 5 7 9 11 13 15 2.50 2.55 2.60 2.65 2.70 amp3 gain (db), 3.3v amp3 gain (db), 5.0v frequency (ghz) t a = ?40c t a = +25c t a = +85c t a = +105c 12233-034 figure 52. amp3 2.6 ghz gain vs. frequency by temperature ?30 ?25 ?20 ?15 ?10 ?5 0 2.50 2.55 2.60 2.65 2.70 amp3 magnitude (db) 12233-035 frequency (ghz) s11 (db) s12 (db) s22 (db) figure 53. amp3 2.6 ghz input return loss (s11), output return loss (s22), and reverse isolation (s12) vs. frequency 15 19 23 27 31 35 39 43 47 25 27 29 31 33 35 37 39 41 2.50 2.55 2.60 2.65 2.70 amp3 oip3 and op1db (dbm), 3.3v amp3 oip3 and op1db (dbm), 5.0v frequency (ghz) op1db, 3.3v oip3, 3.3v t a = ?40c t a = +25c t a = +85c t a = +105c oip3, 5.0v op1db3, 5.0v 12233-036 figure 54. amp3 2.6 ghz oip3 at p out = 0dbm/tone and op1db vs. frequency and temperature 20 25 30 35 40 45 ?10?5 0 5 101520 amp3 oip3 (dbm) p out (dbm) 2.5ghz, 5.0v 2.6ghz, 5.0v 2.7ghz, 5.0v 2.5ghz, 3.3v 2.6ghz, 3.3v 2.7ghz, 3.3v 12233-037 figure 55. amp3 2.6 ghz oip3 vs. p out by frequency 5 6 7 8 9 10 11 2.50 2.55 2.60 2.65 2.70 amp3 noise figure (db) frequency (ghz) t a = ?40c, 5.0v t a = +25c, 5.0v t a = +85c, 5.0v t a = +105c, 5.0v t a = ?40c, 3.3v t a = +25c, 3.3v t a = +85c, 3.3v t a = +105c, 3.3v 12233-038 figure 56. amp3 2.6 ghz noise figu re vs. frequency by temperature
data sheet ADL5246 rev. a | page 19 of 36 1.0 1.5 2.0 2.5 3.0 3.5 4.0 10 15 20 25 30 35 40 2.10 2.15 2.20 2.25 2.30 noise figure (db) full chain gain, oip3, op1db (db, dbm) frequency (ghz) gain, 5.0v op1db, 5.0v oip3, 5.0v noise figure, 5.0v gain, 3.3v op1db, 3.3v oip3, 3.3v noise figure, 3.3v 12233-039 figure 57. full chain 2.2 ghz gain, oip3 at p out = 5 dbm/tone, op1db, and noise figure vs. frequency at maximum gain ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 2.10 2.15 2.20 2.25 2.30 full chain magnitude (db) frequency (ghz) s11 (db) s12 (db) s22 (db) 12233-040 figure 58. full chain 2.2 ghz magnitude of input return loss (s11), output return loss (s22), and reverse isolation (s12) vs. frequency at maximum gain 26 28 30 32 34 36 38 40 ?10?5 0 5 101520 full chain oip3 (dbm) p out (dbm) 2.1ghz, 5.0v 2.2ghz, 5.0v 2.3ghz, 5.0v 2.1ghz, 3.3v 2.2ghz, 3.3v 2.3ghz, 3.3v 12233-041 figure 59. full chain 2.2 ghz oip3 vs. p out by frequency at maximum gain 20 25 30 35 40 45 50 55 60 ?40 ?30 ?20 ?10 0 10 20 30 40 50 60 70 80 90 100 110 amp1 supply current (ma) temperature (c) 3.135v 3.300v 3.465v 4.750v 5.000v 5.250v 12233-042 figure 60. amp1 supply curren t vs. temperature by voltage 20 30 40 50 60 70 80 ?10?5 0 5 10152025 amp1 supply current (ma) p out (dbm) t a = ?40c, 5.0v t a = +25c, 5.0v t a = +105c, 5.0v t a = ?40c, 3.3v t a = +25c, 3.3v t a = +105c, 3.3v 12233-043 figure 61. amp1 supply current vs. p out by temperature 20 40 60 80 100 120 140 160 180 ?40 ?30 ?20 ?10 0 10 20 30 40 50 60 70 80 90 100 110 amp3 supply current (ma) temperature (c) 3.135v 3.300v 3.465v 4.750v 5.000v 5.250v 12233-044 figure 62. amp3 supply curren t vs. temperature by voltage
ADL5246 data sheet rev. a | page 20 of 36 50 100 150 200 250 350 300 400 ?10 ?5 0 5 10 15 20 25 30 amp3 supply current (ma) p out (dbm) t a = ?40c, 5.0v t a = +25c, 5.0v t a = +105c, 5.0v t a = ?40c, 3.3v t a = +25c, 3.3v t a = +105c, 3.3v 12233-045 figure 63. amp3 supply current vs. p out by temperature 13.0 12.5 12.0 11.5 11.0 10.5 10.0 20 15 10 5 0 amp1 gain (db) percent (%) represents three batch lots 12233-046 figure 64. amp1 gain distribution at 2.2 ghz 24.0 23.5 23.0 22.5 22.0 21.5 21.0 20.5 20.0 40 30 20 10 0 amp1 op1db (dbm) percent (%) 12233-047 represents three batch lots figure 65. amp1 op1db distribution at 2.2 ghz 41 40 39 38 37 36 35 25 20 15 10 5 0 amp1 oip3 (db) percent (%) represents three batch lots 12233-048 figure 66. amp1 oip3 distribution at 2.2 ghz, p out = 0 dbm/tone 1.20 1.15 1.10 1.05 1.00 0.95 0.90 25 20 15 10 5 0 amp1 noise figure (db) percent (%) represents three batch lots 12233-049 figure 67. amp1 no ise figure distribution at 2.2 ghz 12233-050 14.0 13.5 13.0 12.5 12.0 11.5 11.0 35 30 25 20 15 10 5 0 amp3 gain (db) percent (%) represents three batch lots figure 68. amp3 gain distribution at 2.2 ghz
data sheet ADL5246 rev. a | page 21 of 36 32.0 31.5 31.030.530.029.529.028.5 28.0 27.5 27.0 26.526.0 25 20 15 10 5 0 amp3 op1db (dbm) percent (%) 12233-051 represents three batch lots figure 69. amp3 op1db distribution, 2.2 ghz 12233-052 39.038.538.037.537.036.536.035.535.034.534.0 25 20 15 10 5 0 amp3 oip3 (db) percent (%) represents three batch lots figure 70. amp3 oip3 distribution at 0 dbm/tone, 2.2 ghz 7.5 7.0 6.5 6.0 5.5 5.0 4.0 4.5 30 25 20 15 10 5 0 amp3 noise figure (db) percent (%) 12233-053 represents three batch lots figure 71. amp3 noise figu re distribution, 2.2 ghz ?50 ?40 ?30 ?20 ?10 0 10 20 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 amp2 gain (db) v gain1 , v gain2 (v) 12233-054 represents three batch lots figure 72. distribution of amp2 gain vs. v gain1 , v gain2 at 1.5 ghz, 5 v supply, hg, both gain controls varied, v gain1 = v gain2 ?50 ?40 ?30 ?20 ?10 0 0 0.5 1 1.5 2 2.5 3 3.5 v gain1 , v gain2 (v) 12233-055 amp2 gain (db) represents three batch lots figure 73. distribution of amp2 gain vs. v gain1 , v gain2 at 1.5 ghz, 5 v supply, lg, both gain controls varied, v gain1 = v gain2
ADL5246 data sheet rev. a | page 22 of 36 terminology full chain configuration the full chain configuration is a serial connection of amplifier 1 (amp1) , amplifier 2 (amp2) , and amplifier 3 (amp3) , in that order. the performance data shown in table 1 and figure 57 through figure 59 are measured without any filters or attenuators between amplifiers. high gain (hg) mode the amplifier within a mp 2 is active and not bypassed. in addition, t he input and output attenuators are active. low gain (lg) mode the amplifier within amp2 is bypassed and inactive. however, t he input and output attenuators remain active . maximum gain when amp2 is in hg mode, v gain1 = v gain2 = 0 v.
data sheet ADL5246 rev. a | page 23 of 36 theory of operation basic connections the basic connections for operating the ADL5246 are shown in figure 74. the schematic of amp3 is configured for operation at 2.2 ghz. amplifier 1 (amp1) amp1 in the ADL5246 is a broadband low noise amplifier. the radio frequency (rf) input is internally matched to 50 and optimally matched for the minimum noise figure and is unconditionally stable. the rf output is internally matched for 50 . the rf inputs and outputs require dc blocking capacitors (c8 and c9) for operation. dc bias is supplied through inductor l1 and is connected to the rfout1 pin. three decoupling capacitors (c40, c41, and c5) prevent rf signals from propagating on the dc supply lines. the value of l1 must be high enough to isolate the bias from rf; however, the exact value is not critical for operation. the self resonance of l1 has little effect upon the operation of amp1, within reasonable limits. amp1 is completely independent from the rest of the ADL5246 and may be left unpowered if not needed. when amp1 is not in use, terminate the rfin1 and rfout1 pins to ground via a 100 pf capacitor and a 50 resistor in series on each pin. amplifier 2 (amp2) amp2 is a 50 internally matched rf vga consisting of two vvas with an lna in between them. rfin2 and rfout2 are internally ac-coupled with a 20 pf on-chip capacitor. the lna has an integral bypass switch that allows the user to choose between a low gain range and a high gain range. when the lna is bypassed, it is also not powered, reducing the supply current by approximately 59 ma. each vva may be controlled independently or in tandem via vgain1 and vgain2. bias is supplied to amp2 via vpos1 and vpos2. vpos1 provides the bias to the amplifier circuit, and vpos2 provides bias to the vvas. therefore, both vpos1 and vpos2 must be connected to bias to operate amp2. inductors l2 and l3 with capacitors c2, c4, c7, c16, c17, and c20 prevent rf signals from propagating on the dc supply lines. the l2 value has some bearing on the gain of amp2, with the 10 nh value giving an unhindered frequency response as low as approximately 0.6 ghz. amp2 is sensitive to capacitance on the vpos2 bias line. place all bypass capacitors as shown in figure 74. excessive capacitance between l3 and pin 28 (vpos2) can cause undesirable gain loss. when amp2 is not in use, terminate the rfin2 and rfout2 pins to ground via a 100 pf capacitor and a 50 resistor in series on each pin. table 5. bypass switch logic mode vsw1 vsw1 undefined 0 0 high gain mode 0 1 low gain mode 1 0 undefined 1 1 rfin1 rfout1 vcc1 rfin2 vsw1 vsw1 vgain2 vpos1 vgain1 100pf 1 2 c40 0.1f c41 1000pf c5 100pf gnd1 gnd2 gnd3 l1 100nh c9 100pf rfout3 c8 c13 100pf c14 100pf r4 100 ? r1 0 ? l3 100nh c3 1.5pf c21 100pf l6 1nh ADL5246 amp1 amp2 amp3 ep gnd nic pins tie to gnd v v a 1 v v a 2 4 5 7 8 9 12 14 17 19 22 3 10 20 23 24 25 27 29 31 1 2 32 6 13 30 15 28 18 21 26 16 11 12233-056 c2 0.1f c4 1000pf c7 10pf l2 10nh c1 2.7pf c20 0.1f c17 1000pf c16 100pf c22 100pf c6 100pf r2 100 ? c11 100pf r3 100 ? c15 100pf rfout2 rfin3 r5 100 ? vpos2 l4 100nh c23 100pf c26 0.1f c25 1000pf c24 100pf vcc2 3 figure 74. basic connections
ADL5246 data sheet rev. a | page 24 of 36 amplifier 3 (amp3) amp3 is a broadband 1?2 watt driver requiring band specific matching to achieve the specified performance. the input and output are easily matched using a combination of series and shunt capacitors and a microstrip line serving as an inductor. vpos2 provides dc bias to the internal bias circuit. bias for the output stage is supplied to the amplif ier via the l4 inductor that is connected to rfout3. therefore, both vpos2 and vcc2 must be connected to bias to operate a mp 3. capacitors c24, c25, and c26 provide the power supply decoupling. when amp3 is not in use, terminate the rfin3 and rfout3 pins to ground via a 100 pf capacitor and a 50 ? resistor in series on each pin. figure 78 shows the matching components for operation at 2.2 ghz. gain contro l the integrated vvas are controlled by vgain1 and vgain2. the attenuators maybe controlled independently , if desired. the gain control voltage range is 0 v to 3.3 v. r4 and r5 isolate the gain control circuit from external capacitance. capacitors c14 and c15 provide decoupling. vsw1 and vsw1 are complementary 3 v logic that is used to control the bypass switch operation and are detailed in table 5 . r2 and r3 isolate the logic control circuitry from external capacitance. the c6 and c11 capacitors provide decoupling. figure 9 through figure 14 show that operating amp2 at 5 v gives greater gain range ; however, operating at 3.3 v gives better phase linearity. operating at 5 v gives better temperatu re sta bility, as shown in figure 17 . it is possi ble to operate the gain control section at 5 v while operating the remainder of the ADL5246 at 3.3 v for reduced power consumption. amplifier 3 matching the input and output of the driver amplifier, amp3, can be matched to 50 using two to three external components. the micro strip transmission line is used as an inductor. the matching component values are listed in table 6 . all capacitors are murata grm15 series (0402 size), l4 is a coilcraf t? 0603cs series (0603 size). the 0603 size is preferred over the 0402 size for additional current handling capability. the self resonance of l4 has little bearing on the performance of a mp 3, within reasonable limits. for all frequency bands, the placement of c1, c3 , and l6 are critical. table 7 lists the component spacing for c1, c3 , and l6. the placement of c3 and r1 are fixed for the matching network on the evaluation board. the spacing is 69 mils and 301 mils , respectively. in the case of 0.75 ghz and 0.9 ghz, a 2 ? resistor is used in place of the capacitor in the c21 location. table 6 . matching component values on the ADL5246 evaluation board frequency (ghz) c21 c3 (pf) l6 (nh) c1 (pf) c23 (pf) r1 ( ) 0.75 2 9 3.3 8.2 100 0 0.9 2 6 3.3 6 100 0 1.9 100 pf 2 1 2.7 100 0 2.2 100 pf 1.5 1 2.7 100 0 2.6 100 pf 1.0 1 2.2 f 100 0 table 7 . matching component spacing on the ADL5246 evaluation board frequency (ghz) c3: 1 (mils) l6: 2 (mils) r1 (mils) c1: 3 (mils) 0.75 69 24 301 528.4 0.9 69 24 301 422.4 1.9 69 24 301 184.2 2.2 69 24 301 75.4 2.6 69 24 301 75.4
data sheet ADL5246 rev. a | page 25 of 36 28 27 26 25 21 22 23 24 rfout3 rfin3 vcc2 c1 8.2pf l6 3.3nh gnd ADL5246 2 3 nic c23 100pf r1 0? c21 2? gnd gnd gnd vpos2 l4 100nh 1 c3 9pf 12233-057 figure 75 . amp3 matching circuit at 0.75 ghz 28 27 26 25 21 22 23 24 rfout3 rfin3 vcc2 c1 6pf l6 3.3nh gnd ADL5246 2 3 c23 100pf r1 0? c21 2? gnd gnd gnd vpos2 1 c3 6pf 12233-058 l4 100nh nic figure 76 . amp3 matching circuit at 0.9 ghz
ADL5246 data sheet rev. a | page 26 of 36 28 27 26 25 21 22 23 24 rfout3 rfin3 vcc2 c1 2.7pf l6 1nh gnd ADL5246 2 3 c23 100pf r1 0? gnd gnd gnd vpos2 1 c3 2pf c21 100pf 12233-059 l4 100nh nic figure 77 . amp3 matching circuit at 1.9 ghz 28 27 26 25 21 22 23 24 rfout3 rfin3 vcc2 c1 2.7pf l6 1nh gnd ADL5246 2 3 c23 100pf r1 0? gnd gnd gnd vpos2 1 c3 1.5pf c21 100pf 12233-060 l4 100nh nic figure 78 . amp3 matching circuit at 2.2 ghz
data sheet ADL5246 rev. a | page 27 of 36 28 27 26 25 21 22 23 24 rfout3 rfin3 vcc2 c1 2.2pf l6 1nh gnd ADL5246 2 3 c23 100pf r1 0? gnd gnd gnd vpos2 1 c3 1pf c21 100pf 12233-061 l4 100nh nic figure 79 . amp3 matching circuit at 2.6 ghz error vector magnitu de (evm) performance evm is a measure used to quantify the performance of a digital radio transmitter or receiver. a signal received by a receiver has all constellation poi nts at their ideal locations; however, various imperfections in the implementation (such as magnitude imbalance, noise floor, and phase imbalance) cause the actual constellation points to deviate from their ideal locations. figure 80 shows the evm vs . the mean output power for a full chain connection (amp1 driving amp2 driving amp3) operating at 2.2 ghz. in general, a receiver exhibits three distinct evm limitations vs. received input signal power. ? at strong signal levels, the distortion components falling in band due to nonlinearities in the device components cause strong degradation to evm as signal levels increase. ? at medium signal levels, where the signal chain b ehaves in a linear manner and the signal is well above any notable noise contributions, evm has a tendency to reach an optimum level determined dominantly by the quadrature accuracy and the precision of the test equipment. as signal levels decrease such th at noise is a major contribution, the evm performance vs. the signal level exhibits a decibel for decibel degradation with decreasing signal level. ? at lower signal levels, where no ise proves to be the dominant limitation, the decibel evm proves to be direc tly proportional to the snr. 13 12 1 1 10 9 8 7 6 5 4 3 2 1 0 ?25 ?20 ?15 ?10 ?5 0 5 10 15 20 25 30 evm (%) mean output power (dbm) 12233-062 figure 80 . evm v s. mean output power ( p out ) of full chain connection at 2.2 ghz , 64 qam , 5 msps , = 0.2 root raised cosine filter , p in = ? 3.7 dbm
ADL5246 data sheet rev. a | page 28 of 36 thermal information and recommended pcb land pattern t he majority of the heat generated during operation is removed via the exposed paddle on the bottom of the package . figure 81 shows the recommended l and pattern for the ADL5246 . to minimize thermal impedance, the exposed paddle on the 5 mm 5 mm lfcsp package is soldered down to a ground plane. to improve thermal dissipation, 25 thermal vias are arranged in a 5 5 array under the exposed paddle. the land pattern on the ADL5246 e valuation board provides a thermal resistance ( ja ) of 16.5c/w. for the best thermal performance, add as many thermal vias as possible under the exposed pad of the lfcsp. if multiple ground layers exist, tie them together using vias. for more information on land patter n design and layout, see the an - 772 application note , a design and manufacturing guide for the lead frame chip scale package (lfcsp) . 25 mils 12 mils 19 . 69 m il s 1 2.0 m il s 35 m il s 16.46 mils 192.92 mils 122.0 mils 122.0 mils 137.8 mils 12233-063 figure 81 . recommended land pattern under ADL5246 full chain operation c onsiderations the gain of a cascaded series of amplifiers may differ from a simple summation of the gain of each amplifier in the chain due to impedance matching considerations. take the following p recautions in the pcb layout of a full chain connection of amp1 driving amp2 driving amp3 : ? the vpos2 pin may couple rf from the three amplifiers into amp2 and lead to instability. therefore, it is recommended that the vpos2 trace be well shielded from the other amplif i ers. to accomplish this with the ADL5246 evaluation board, the vpos2 trace passes through a via to the bottom side of the pcb close to p in 28. ? at frequencies below 1.5 ghz, there can be more than 40 db of gain from the full chain connection. with so much gain available, take care to main tain stable operation. coupling from trace to trace on the pcb can be a significant factor leading to instability. minimizing coupling between the amplifiers through good pcb layout is important. it can be helpful to reduce the overall gain with resistance before amp3 (such as r10 on the evaluation board) or to include filters or attenuators be tween the amplifiers.
data sheet ADL5246 rev. a | page 29 of 36 evaluation board the schematic of the ADL5246 evaluation board is show n in figure 82. all rf traces on the evaluation board have a characteristic impedance of 50 and are fabricated from fr408 material. the traces are grounded coplanar waveguide (g cpwg ) wi th a width of 25 mi ls, spacing to ground of 20 mils, and dielectric thickness of 13 mils. to ensure broadband performance , t he inputs and outputs of amp1, amp2 , and amp3 are ac - coupled with 100 pf capacitors. the bias to amp1 is provided through the l1 inductor . vpos1 and v pos2 provide bias to amp2. the l2 and l3 inductors provide a high impedance to the rf signals that might be present on these pins. the amp3 bias circuit receives bias from vpos2. the amp3 output receives bias through the l1 inductor . bypassing capacitors are recommended on all supply lines to minimize rf coupling. amp3 on the ADL5246 evaluation board is configured for 2.2 ghz operation. the evaluation board is designed so that the gain control pins of amp2 can be controlled individually or in tandem using vgain1 and vgain2. the gain range is switched by providing the appropriate logic level to the internal bypass switch via vsw1 and vsw1 . see table 5 for switch control logic information. by default , the ADL5246 evaluation board is configured to evaluate each of the amplifiers individually. to configure the evaluation board to cascade amp1, amp2 , and amp3, remove the c9, c13 , c21 , and c22 blocking capacitors and install the c10, c12, c18 , and c19 capacitors . the c33, c34, c31 , c32, l8 , and l7 components a re place holder s that allow for adding filter s between the gain stages , if require d. if a filter is not being used , install a 0 resistor as a jumper in place of l7 and l8. inductor l5 is provided for optional interstage tuning between rfout2 and rfin3. table 8 . evaluation board configurations options component function default value vcc1, vcc2 vpos1, vpos2, gnd1, gnd2, gnd3 power supply and ground test loops. installed r6, r7 jumpers to connect vpos1 and vpos2 to the internal power plane. r6, r7 = 0 u1 ADL5246 acpzn the device under test. installed rfin1, rfout1, rfin2, rfout2, rfin3, rfout3 rf input and output sma connecters. installed r8, r9, r10, r11 jumpers to facilitate the modification of the rf connections between the amplifier blocks. r8, r9, r10, r11 = 0 c8, c9 ac coupling capacitors for amp1. c8, c9 = 100 pf c5, c40, c41 power supply decoupling capacitors for amp1. of these three capacitors, c5 must be located closest to the device. c5 = 100 pf , c40 = 0.1 f , c41 = 1000 pf l1 the bias for amp1 comes through l1 when connected to a 5 v supply. l1 must be high impedance for the frequency of operation, while providing low resistance for the dc current. l1 = 100 nh vsw1, vsw1 logic control test loops for the amp2 integrated bypass switch. installed r2, r3, c6, c11 r2 and r3 isolate the switch control pins from the external capacitance. c6 and c11 provide the decoupling. r2, r3 = 100 , c6, c11 = 100 pf vgain1, vgain2 vgain1 and vgain2 are test loops to apply the control voltage to the integrated vvas. installed r4, r5 , c14, c1 5 r4 and r5 isolate the gain control pins from external capacitance. c 14 and c1 5 provide the decoupling . r4, r5 = 100 , c 14 , c1 5 = 100 pf c13, c22 ac coupling capacitors for amp2. c13, c22 = 100 pf c2, c4, c7, c16, c17, c20 power supply decoupling capacitors for amp2. of these six capacitors, c7 and c16 must be located closest to the device . c7, c16 = 100 pf , c2, c20 = 0.1 f , c4, c17 = 1000 pf l2, l3 the bias for amp2 comes through l2 and l3 when connected to a 5 v supply. l2 and l3 must be high impedance for the frequency of operation, while providing low resistance for the dc current. l2 = 10 nh , l3 = 100 nh l5 l5 is an optional tuning element, which can aid gain, bandwidth , and op1db in some circumstances. l5 = do not install (dni) c2 1 , c23 ac coupling capacitors for amp3. c2 1 , c23 = 100 pf
ADL5246 data sheet rev. a | page 30 of 36 component function default value l6, c3 amp3 input matching elements. l6 = 1 nh , c3 = 1.5 pf c24, c25, c26 power supply decoupling capacitors for amp1. of these three capacitors, c24 must be located closest to the device. c24 = 100 pf , c25 = 1000 pf , c26 = 0.1 f l4 the bias for amp3 comes through l4 when connected to a 5 v supply. l4 must be high impedance for the frequency of operation, while providing low resistance for the dc current. l4 = 100 nh c1, r1 c1 is the output matching element for amp3. r1 is a placeholder for the optional tuning configurations. c1 = 2.7 pf , r1 = 0 c10, c12, c18, c19, c27 to c34 , l7, l8 optional components for loop integration. c10, c12, c18, c19, c27 to c34, l7, and l8 = dni
data sheet ADL5246 rev. a | page 31 of 36 vpos1 gnd vpos2 gnd vsw1 gnd vgain1 vgain2 gnd gnd to paddle gnd ADL5246 vsw1 vsw1 rfout3 gnd rfin2 gnd rfin1 rfout1 rfout2 nic rfin3 gnd nic nic nic nic nic gnd nic gnd nic nic nic r9 r8 r11 r10 r7 r6 l6 r3 c15 c14 c11 c6 r2 r5 r4 l4 l2 c8 c3 l3 l1 c1 vpos2 vcc1 vpos1 vgain2 vgain1 vsw1 vcc2 r1 l5 c31 c32 l8 c34 c33 c29 c30 c28 c27 gnd3 gnd2 gnd1 rfin2 c13 c9 c26 c25 rfout3 c23 c24 c20 c17 c16 c21 rfin3 rfout2 c22 c19 c18 c12 c10 rfout1 c5 c41 c40 rfin1 c7 c4 c2 pad 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 u1 dni 1.5pf 100pf 100pf 100pf 0.1f 0.1f 1000pf dni dni dni 100pf dni dni dni dni dni dni 0.1f 100pf dni 100pf 1000pf 1000pf 100pf 100nh 100nh 100pf 100pf 100pf 100pf 100pf 0.1f 1000pf 100pf 100nh 100pf 10nh 2.7pf vpos vpos 1nh dni dni dni 0? l7 dni 0? 0? 0? 0? 0? 100? 100? 100? 100? 0? 2 1 3 12233-064 figure 82 . evaluation board schematic
ADL5246 data sheet rev. a | page 32 of 36 12233-065 figure 83 . evaluation board layout top 12233-066 figure 84 . evaluation board l ayout bottom
data sheet ADL5246 rev. a | page 33 of 36 characterization inf ormation the ADL5246 was characterized with multiple samples obtained from three batch lots. each ADL5246 was attached to its own circuit board that was dedicated and tuned to one of the a mp 3 frequency bands. this created a body of boards dedicated to each band. a mp 1 and a mp 2 operate over a broad frequenc y range and do not require tuning. aggregating boards with their a mp 3 tuned to the various bands increased the sample size for the characterization of a mp 1 and a mp 2. characterization measurements employed an agilent technologies pna - x vector netw ork analyzer, scalar rack and stack equipment , a noise figure analyzer , and temperature forcing equipment, all under software control. the typical performance figures represent one typical ADL5246 w ith performance near the median of a body of available samples. a typical example ADL5246 was selected to repr e sent a mp 1 and a different ADL5246 was selected to represent a mp 2. separate examples are used for each of the a mp 3 bands ; therefore, the a mp 3 plots do not show the same ADL5246 board retuned to each band. the plots show the performance obtained by th e typical ADL5246 chosen to demonstrate each amplifier , rather than showing the numerical median of all the samples measured for any one parameter. the circuit boards used for device characterization are fabricated with isola fr408, which offers a low coefficient of thermal expansion ( cte ) and lower attenuation than standard fr4 without the fragility of rogers materials. all three amplifiers are powered on even when not directly in use and this made heat a concern when testing in a high temperature environment. two 10 mm 1 0 mm heat sink s are attached to the back of the circuit board with arctic silver thermal a dhesive. this lowered the ja at the top of the pac kage from 1 6 .5 c/ w without the heat sink to 1 2 .5 c/ w with one, making operating a mp 3 at p1db output power levels in a 105 c ambien t temperature possible without reaching the maximum junction temperature of the ADL5246 .
ADL5246 data sheet rev. a | page 34 of 36 outline dimensions 1 0.50 bsc bottom view top view pin 1 indic a t or 32 9 16 17 24 25 8 exposed pa d pin 1 indic a t or sea ting plane 0.05 max 0.02 nom 0.20 ref coplanarity 0.05 0.30 0.25 0.18 5.10 5.00 sq 4.90 0.80 0.75 0.70 for proper connection of the exposed pad, refer to the pin configuration and function descriptions section of this data sheet. 0.45 0.40 0.35 0.20 min 3.40 3.30 sq 3.20 compliant to jedec standards mo-220- whhd-5 . 05-29-2013- a pkg-4280 figure 85 . 32 - lead lead frame chip scale package [lfcsp _w q] 5 mm 5mm body, very very thin quad (cp - 32 - 20 ) dimensions shown in millimeters ordering guide model 1 temperature range package description package option ADL5246acpzn -r7 ?40c to +105c 32- lead lead frame chip scale package [lfcsp _w q] cp -32-20 ADL5246 - evalz evaluation board 1 z = rohs compliant part.
data sheet ADL5246 rev. a | page 35 of 3 6 notes
ADL5246 data sheet rev. a | page 36 of 36 notes ? 2014 C 2015 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d12233 - 0 - 9/15(a)

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